Searched refs:swreg3 (Results 1 – 2 of 2) sorted by relevance
1397 …regs->swreg3.sw_filtering_dis = (dxva->loop_filter.filter_level[0] == 0) && (dxva->loop_filte… in vdpu_av1d_set_loopfilter()1905 regs->swreg3.sw_dec_mode = 17; // av1 mode in vdpu_av1d_gen_regs()1906 regs->swreg3.sw_skip_mode = dxva->coding.skip_mode; in vdpu_av1d_gen_regs()1907 regs->swreg3.sw_dec_out_ec_byte_word = 0; // word align in vdpu_av1d_gen_regs()1908 regs->swreg3.sw_write_mvs_e = 1; in vdpu_av1d_gen_regs()1909 regs->swreg3.sw_dec_out_ec_bypass = 1; in vdpu_av1d_gen_regs()
1596 } swreg3; member