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Searched refs:sseu (Results 1 – 22 of 22) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gt/
H A Dintel_sseu.c11 void intel_sseu_set_info(struct sseu_dev_info *sseu, u8 max_slices, in intel_sseu_set_info() argument
14 sseu->max_slices = max_slices; in intel_sseu_set_info()
15 sseu->max_subslices = max_subslices; in intel_sseu_set_info()
16 sseu->max_eus_per_subslice = max_eus_per_subslice; in intel_sseu_set_info()
18 sseu->ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices); in intel_sseu_set_info()
19 GEM_BUG_ON(sseu->ss_stride > GEN_MAX_SUBSLICE_STRIDE); in intel_sseu_set_info()
20 sseu->eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice); in intel_sseu_set_info()
21 GEM_BUG_ON(sseu->eu_stride > GEN_MAX_EU_STRIDE); in intel_sseu_set_info()
25 intel_sseu_subslice_total(const struct sseu_dev_info *sseu) in intel_sseu_subslice_total() argument
29 for (i = 0; i < ARRAY_SIZE(sseu->subslice_mask); i++) in intel_sseu_subslice_total()
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H A Dintel_sseu_debugfs.c11 static void sseu_copy_subslices(const struct sseu_dev_info *sseu, in sseu_copy_subslices() argument
14 int offset = slice * sseu->ss_stride; in sseu_copy_subslices()
16 memcpy(&to_mask[offset], &sseu->subslice_mask[offset], sseu->ss_stride); in sseu_copy_subslices()
20 struct sseu_dev_info *sseu) in cherryview_sseu_device_status() argument
40 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
41 sseu->subslice_mask[0] |= BIT(ss); in cherryview_sseu_device_status()
46 sseu->eu_total += eu_cnt; in cherryview_sseu_device_status()
47 sseu->eu_per_subslice = max_t(unsigned int, in cherryview_sseu_device_status()
48 sseu->eu_per_subslice, eu_cnt); in cherryview_sseu_device_status()
54 struct sseu_dev_info *sseu) in gen10_sseu_device_status() argument
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H A Dintel_sseu.h59 intel_sseu_from_device_info(const struct sseu_dev_info *sseu) in intel_sseu_from_device_info() argument
62 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
63 .subslice_mask = sseu->subslice_mask[0], in intel_sseu_from_device_info()
64 .min_eus_per_subslice = sseu->max_eus_per_subslice, in intel_sseu_from_device_info()
65 .max_eus_per_subslice = sseu->max_eus_per_subslice, in intel_sseu_from_device_info()
72 intel_sseu_has_subslice(const struct sseu_dev_info *sseu, int slice, in intel_sseu_has_subslice() argument
78 GEM_BUG_ON(ss_idx >= sseu->ss_stride); in intel_sseu_has_subslice()
80 mask = sseu->subslice_mask[slice * sseu->ss_stride + ss_idx]; in intel_sseu_has_subslice()
85 void intel_sseu_set_info(struct sseu_dev_info *sseu, u8 max_slices,
89 intel_sseu_subslice_total(const struct sseu_dev_info *sseu);
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H A Dintel_context_sseu.c18 const struct intel_sseu sseu) in gen8_emit_rpcs_config() argument
33 *cs++ = intel_sseu_make_rpcs(rq->engine->gt, &sseu); in gen8_emit_rpcs_config()
41 gen8_modify_rpcs(struct intel_context *ce, const struct intel_sseu sseu) in gen8_modify_rpcs() argument
66 ret = gen8_emit_rpcs_config(rq, ce, sseu); in gen8_modify_rpcs()
76 const struct intel_sseu sseu) in intel_context_reconfigure_sseu() argument
87 if (!memcmp(&ce->sseu, &sseu, sizeof(sseu))) in intel_context_reconfigure_sseu()
90 ret = gen8_modify_rpcs(ce, sseu); in intel_context_reconfigure_sseu()
92 ce->sseu = sseu; in intel_context_reconfigure_sseu()
H A Dintel_workarounds.c451 if (!is_power_of_2(gt->info.sseu.subslice_7eu[i])) in skl_tune_iz_hashing()
460 ss = ffs(gt->info.sseu.subslice_7eu[i]) - 1; in skl_tune_iz_hashing()
1085 const struct sseu_dev_info *sseu = &i915->gt.info.sseu; in wa_init_mcr() local
1119 if (INTEL_GEN(i915) >= 10 && is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
1130 slice = fls(sseu->slice_mask) - 1; in wa_init_mcr()
1131 subslice = fls(l3_en & intel_sseu_get_subslices(sseu, slice)); in wa_init_mcr()
1135 intel_sseu_get_subslices(sseu, slice), l3_en); in wa_init_mcr()
H A Dintel_gt_types.h123 struct sseu_dev_info sseu; member
H A Dintel_context_types.h124 struct intel_sseu sseu; member
H A Dintel_context.c375 ce->sseu = engine->sseu; in intel_context_init()
H A Dintel_engine_cs.c721 engine->sseu = in engine_setup_common()
722 intel_sseu_from_device_info(&engine->gt->info.sseu); in engine_setup_common()
1106 const struct sseu_dev_info *sseu = &engine->gt->info.sseu; in intel_engine_get_instdone() local
1130 for_each_instdone_slice_subslice(i915, sseu, slice, subslice) { in intel_engine_get_instdone()
H A Dintel_context.h42 const struct intel_sseu sseu);
H A Dintel_engine_types.h336 struct intel_sseu sseu; member
H A Dintel_gt.c664 intel_sseu_dump(&info->sseu, p); in intel_gt_info_print()
H A Dintel_rps.c1075 switch (gt->info.sseu.eu_total) { in chv_rps_max_freq()
H A Dintel_lrc.c3472 intel_sseu_make_rpcs(engine->gt, &ce->sseu); in __execlists_update_reg_state()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Di915_query.c34 const struct sseu_dev_info *sseu = &dev_priv->gt.info.sseu; in query_topology_info() local
42 if (sseu->max_slices == 0) in query_topology_info()
45 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
47 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
48 subslice_length = sseu->max_slices * sseu->ss_stride; in query_topology_info()
49 eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; in query_topology_info()
62 topo.max_slices = sseu->max_slices; in query_topology_info()
63 topo.max_subslices = sseu->max_subslices; in query_topology_info()
64 topo.max_eus_per_subslice = sseu->max_eus_per_subslice; in query_topology_info()
67 topo.subslice_stride = sseu->ss_stride; in query_topology_info()
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H A Di915_getparam.c15 const struct sseu_dev_info *sseu = &i915->gt.info.sseu; in i915_getparam_ioctl() local
73 value = intel_sseu_subslice_total(sseu); in i915_getparam_ioctl()
78 value = sseu->eu_total; in i915_getparam_ioctl()
95 value = sseu->min_eu_in_pool; in i915_getparam_ioctl()
147 value = sseu->slice_mask; in i915_getparam_ioctl()
152 value = sseu->subslice_mask[0]; in i915_getparam_ioctl()
H A Di915_perf_types.h416 struct intel_sseu sseu; member
H A Di915_perf.c365 struct intel_sseu sseu; member
2229 flex->value = intel_sseu_make_rpcs(ce->engine->gt, &ce->sseu); in gen8_configure_context()
2373 regs[0].value = intel_sseu_make_rpcs(engine->gt, &ce->sseu); in oa_configure_all_contexts()
2773 const struct sseu_dev_info *devinfo_sseu = &engine->gt->info.sseu; in get_default_sseu_config()
2934 perf->sseu = props->sseu; in i915_oa_stream_init()
3442 get_default_sseu_config(&props->sseu, props->engine); in i915_perf_open_ioctl_locked()
3666 ret = get_sseu_config(&props->sseu, props->engine, &user_sseu); in read_properties_unlocked()
H A Di915_gpu_error.c432 const struct sseu_dev_info *sseu = &ee->engine->gt->info.sseu; in error_print_instdone() local
448 for_each_instdone_slice_subslice(m->i915, sseu, slice, subslice) in error_print_instdone()
453 for_each_instdone_slice_subslice(m->i915, sseu, slice, subslice) in error_print_instdone()
688 intel_sseu_print_topology(&gt->info.sseu, &p); in err_print_gt_info()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_context.c1153 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
1194 struct intel_sseu sseu) in __sseu_test() argument
1205 ret = intel_context_reconfigure_sseu(ce, sseu); in __sseu_test()
1210 hweight32(sseu.slice_mask), spin); in __sseu_test()
1255 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
1258 if (!engine->gt->info.sseu.has_slice_pg) in __igt_ctx_sseu()
1265 pg_sseu = engine->sseu; in __igt_ctx_sseu()
1268 ~(~0 << (hweight32(engine->sseu.subslice_mask) / 2)); in __igt_ctx_sseu()
1272 hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
1286 ret = __sseu_test(name, flags, ce, obj, engine->sseu); in __igt_ctx_sseu()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gem/
H A Di915_gem_context.c1429 const struct sseu_dev_info *device = &gt->info.sseu; in i915_gem_user_to_context_sseu()
1529 struct intel_sseu sseu; in set_sseu() local
1563 ret = i915_gem_user_to_context_sseu(ce->engine->gt, &user_sseu, &sseu); in set_sseu()
1567 ret = intel_context_reconfigure_sseu(ce, sseu); in set_sseu()
2245 clone->engines[n]->sseu = ce->sseu; in clone_sseu()
2461 user_sseu.slice_mask = ce->sseu.slice_mask; in get_sseu()
2462 user_sseu.subslice_mask = ce->sseu.subslice_mask; in get_sseu()
2463 user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice; in get_sseu()
2464 user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice; in get_sseu()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_ads.c102 blob->system_info.slice_enabled = hweight8(gt->info.sseu.slice_mask); in __guc_ads_init()