Searched refs:mpll_reg (Results 1 – 1 of 1) sorted by relevance
53 static ulong ast2500_get_mpll_rate(ulong clkin, u32 mpll_reg) in ast2500_get_mpll_rate() argument55 const ulong num = (mpll_reg & SCU_MPLL_NUM_MASK) >> SCU_MPLL_NUM_SHIFT; in ast2500_get_mpll_rate()56 const ulong denum = (mpll_reg & SCU_MPLL_DENUM_MASK) in ast2500_get_mpll_rate()58 const ulong post_div = (mpll_reg & SCU_MPLL_POST_MASK) in ast2500_get_mpll_rate()224 u32 mpll_reg; in ast2500_configure_ddr() local233 mpll_reg = readl(&scu->m_pll_param); in ast2500_configure_ddr()234 mpll_reg &= ~(SCU_MPLL_POST_MASK | SCU_MPLL_NUM_MASK in ast2500_configure_ddr()236 mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT) in ast2500_configure_ddr()241 writel(mpll_reg, &scu->m_pll_param); in ast2500_configure_ddr()244 return ast2500_get_mpll_rate(clkin, mpll_reg); in ast2500_configure_ddr()