Searched refs:mpll_config (Results 1 – 2 of 2) sorted by relevance
778 const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; in hdmi_phy_configure_dwc_hdmi_3d_tx() local787 mpll_config = pdata->mpll_cfg_420; in hdmi_phy_configure_dwc_hdmi_3d_tx()790 for (; mpll_config->mpixelclock != ~0UL; mpll_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()791 if (mpixelclock <= mpll_config->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()802 if (mpll_config->mpixelclock == ~0UL || in hdmi_phy_configure_dwc_hdmi_3d_tx()814 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce, in hdmi_phy_configure_dwc_hdmi_3d_tx()817 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp, in hdmi_phy_configure_dwc_hdmi_3d_tx()
1883 const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; in hdmi_phy_configure_dwc_hdmi_3d_tx() local1892 mpll_config = pdata->mpll_cfg_420; in hdmi_phy_configure_dwc_hdmi_3d_tx()1897 for (; mpll_config->mpixelclock != ~0UL; mpll_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()1898 if (mpixelclock <= mpll_config->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()1909 if (mpll_config->mpixelclock == ~0UL || in hdmi_phy_configure_dwc_hdmi_3d_tx()1921 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce, in hdmi_phy_configure_dwc_hdmi_3d_tx()1923 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp, in hdmi_phy_configure_dwc_hdmi_3d_tx()