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Searched refs:mmVCE_CLOCK_GATING_A (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h26 #define mmVCE_CLOCK_GATING_A 0x80BE macro
H A Dvce_2_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
H A Dvce_3_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
H A Dvce_4_0_offset.h92 #define mmVCE_CLOCK_GATING_A … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v2_0.c151 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v2_0_init_cg()
155 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
172 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v2_0_mc_resume()
H A Dvce_v3_0.c529 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v3_0_mc_resume()
759 uint32_t data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_set_clockgating_state()
762 WREG32(mmVCE_CLOCK_GATING_A, data); in vce_v3_0_set_clockgating_state()
827 data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_get_clockgating_state()
H A Dvce_v4_0.c604 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A), 0, ~(1 << 16)); in vce_v4_0_mc_resume()
908 uint32_t data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A);
911 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A, data);