| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v5_0.c | 604 data1 = RREG32(mmUVD_SUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating()
642 WREG32(mmUVD_SUVD_CGC_GATE, data1); in uvd_v5_0_enable_clock_gating()
699 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
730 WREG32(mmUVD_SUVD_CGC_GATE, data1);
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| H A D | uvd_v6_0.c | 623 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
691 WREG32(mmUVD_SUVD_CGC_GATE, data1);
1255 data1 = RREG32(mmUVD_SUVD_CGC_GATE); in uvd_v6_0_enable_clock_gating()
1302 WREG32(mmUVD_SUVD_CGC_GATE, data1); in uvd_v6_0_enable_clock_gating()
1360 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
1393 WREG32(mmUVD_SUVD_CGC_GATE, data1);
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| H A D | uvd_v7_0.c | 1586 data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);
1633 WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);
1642 data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);
1675 WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);
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| H A D | vcn_v1_0.c | 527 data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE); in vcn_v1_0_disable_clock_gating()
552 WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data); in vcn_v1_0_disable_clock_gating()
689 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_SUVD_CGC_GATE, 1, 0xFFFFFFFF, sram_sel); in vcn_v1_0_clock_gating_dpg_mode()
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| H A D | vcn_v2_5.c | 619 data = RREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_GATE); in vcn_v2_5_disable_clock_gating()
644 WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_GATE, data); in vcn_v2_5_disable_clock_gating()
702 VCN, 0, mmUVD_SUVD_CGC_GATE), 1, sram_sel, indirect); in vcn_v2_5_clock_gating_dpg_mode()
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| H A D | vcn_v2_0.c | 552 data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE); in vcn_v2_0_disable_clock_gating()
577 WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data); in vcn_v2_0_disable_clock_gating()
634 UVD, 0, mmUVD_SUVD_CGC_GATE), 1, sram_sel, indirect); in vcn_v2_0_clock_gating_dpg_mode()
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| H A D | vcn_v3_0.c | 715 data = RREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE); in vcn_v3_0_disable_clock_gating()
747 WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE, data); in vcn_v3_0_disable_clock_gating()
821 VCN, inst_idx, mmUVD_SUVD_CGC_GATE), 1, sram_sel, indirect); in vcn_v3_0_clock_gating_dpg_mode()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_5_0_d.h | 89 #define mmUVD_SUVD_CGC_GATE 0x3be4 macro
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| H A D | uvd_6_0_d.h | 105 #define mmUVD_SUVD_CGC_GATE 0x3be4 macro
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| H A D | uvd_7_0_offset.h | 66 #define mmUVD_SUVD_CGC_GATE … macro
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 154 #define mmUVD_SUVD_CGC_GATE … macro
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| H A D | vcn_2_5_offset.h | 505 #define mmUVD_SUVD_CGC_GATE … macro
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| H A D | vcn_2_0_0_offset.h | 818 #define mmUVD_SUVD_CGC_GATE … macro
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| H A D | vcn_3_0_0_offset.h | 821 #define mmUVD_SUVD_CGC_GATE … macro
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