Home
last modified time | relevance | path

Searched refs:mmSDMA0_GFX_RB_WPTR_POLL_CNTL (Results 1 – 14 of 14) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h218 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL … macro
H A Dsdma0_4_0_offset.h222 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL 0x0087 macro
H A Dsdma0_4_2_offset.h218 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL … macro
H A Dsdma0_4_2_2_offset.h222 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_0.c92 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
140 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
161 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
268 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
1199 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL); in sdma_v4_0_gfx_resume()
1203 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl); in sdma_v4_0_gfx_resume()
H A Dsdma_v5_0.c67 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
93 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
693 mmSDMA0_GFX_RB_WPTR_POLL_CNTL)); in sdma_v5_0_gfx_resume()
697 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL), in sdma_v5_0_gfx_resume()
H A Dsdma_v3_0.c720 wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
732 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl); in sdma_v3_0_gfx_resume()
H A Dsdma_v5_2.c623 mmSDMA0_GFX_RB_WPTR_POLL_CNTL)); in sdma_v5_2_gfx_resume()
627 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL), in sdma_v5_2_gfx_resume()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h192 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL 0x3485 macro
H A Doss_3_0_1_d.h219 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL 0x3485 macro
H A Doss_2_0_d.h251 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL 0x3485 macro
H A Doss_3_0_d.h344 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL 0x3485 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h216 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL … macro
H A Dgc_10_3_0_offset.h202 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL … macro