Searched refs:mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO (Results 1 – 14 of 14) sorted by relevance
264 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO … macro
268 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x00b3 macro
268 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO … macro
194 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
221 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
253 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
346 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
716 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO + sdma_offsets[i], in sdma_v3_0_gfx_resume()
618 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), in sdma_v5_2_gfx_resume()
688 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), in sdma_v5_0_gfx_resume()
1195 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO, in sdma_v4_0_gfx_resume()
261 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO … macro
248 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO … macro