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Searched refs:mmRLC_CP_SCHEDULERS (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v8.c192 value = RREG32(mmRLC_CP_SCHEDULERS); in kgd_hqd_load()
195 WREG32(mmRLC_CP_SCHEDULERS, value); in kgd_hqd_load()
H A Damdgpu_amdkfd_gfx_v10_3.c216 value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS)); in hqd_load_v10_3()
219 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value); in hqd_load_v10_3()
H A Dgfx_v10_0.c6113 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v10_0_kiq_setting()
6116 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
6118 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
7067 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v10_0_hw_fini()
7069 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_hw_fini()
H A Dgfx_v8_0.c4342 tmp = RREG32(mmRLC_CP_SCHEDULERS); in gfx_v8_0_kiq_setting()
4345 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
4347 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
H A Dgfx_v9_0.c3392 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v9_0_kiq_setting()
3395 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
3397 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h1485 #define mmRLC_CP_SCHEDULERS 0xecaa macro
H A Dgfx_8_0_d.h1489 #define mmRLC_CP_SCHEDULERS 0xecaa macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6203 #define mmRLC_CP_SCHEDULERS … macro
H A Dgc_9_2_1_offset.h6401 #define mmRLC_CP_SCHEDULERS … macro
H A Dgc_9_1_offset.h6425 #define mmRLC_CP_SCHEDULERS … macro
H A Dgc_10_1_0_offset.h9511 #define mmRLC_CP_SCHEDULERS … macro
H A Dgc_10_3_0_offset.h9335 #define mmRLC_CP_SCHEDULERS … macro