Home
last modified time | relevance | path

Searched refs:mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h471 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h159 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h139 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h120 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h657 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX … macro