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Searched refs:mmGB_TILE_MODE0 (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dvi.c475 {mmGB_TILE_MODE0},
568 case mmGB_TILE_MODE0: in vi_get_register_value()
600 idx = (reg_offset - mmGB_TILE_MODE0); in vi_get_register_value()
H A Dcik.c990 {mmGB_TILE_MODE0},
1084 case mmGB_TILE_MODE0: in cik_get_register_value()
1116 idx = (reg_offset - mmGB_TILE_MODE0); in cik_get_register_value()
H A Dgfx_v6_0.c641 WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]); in gfx_v6_0_tiling_mode_table_init()
847 WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]); in gfx_v6_0_tiling_mode_table_init()
1071 WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]); in gfx_v6_0_tiling_mode_table_init()
1295 WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]); in gfx_v6_0_tiling_mode_table_init()
H A Dsi.c1090 case mmGB_TILE_MODE0: in si_get_register_value()
1122 idx = (reg_offset - mmGB_TILE_MODE0); in si_get_register_value()
H A Dgfx_v8_0.c2289 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2479 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2668 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2871 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3073 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3244 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3421 WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
H A Dgfx_v7_0.c1216 WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
1399 WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
1569 WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h658 #define mmGB_TILE_MODE0 0x2644 macro
H A Dgfx_7_0_d.h692 #define mmGB_TILE_MODE0 0x2644 macro
H A Dgfx_7_2_d.h705 #define mmGB_TILE_MODE0 0x2644 macro
H A Dgfx_8_1_d.h777 #define mmGB_TILE_MODE0 0x2644 macro
H A Dgfx_8_0_d.h777 #define mmGB_TILE_MODE0 0x2644 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h947 #define mmGB_TILE_MODE0 macro
H A Dgc_9_2_1_offset.h883 #define mmGB_TILE_MODE0 macro
H A Dgc_9_1_offset.h917 #define mmGB_TILE_MODE0 macro
H A Dgc_10_1_0_offset.h2859 #define mmGB_TILE_MODE0 macro