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Searched refs:mmDP0_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3129 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x1CD1 macro
H A Ddce_8_0_d.h3876 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x1cd1 macro
H A Ddce_10_0_d.h4508 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x4ab0 macro
H A Ddce_11_0_d.h4488 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x4ab0 macro
H A Ddce_11_2_d.h5720 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x4ab0 macro
H A Ddce_12_0_offset.h10226 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h8379 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_2_1_0_offset.h9883 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_2_0_0_offset.h10976 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_0_0_offset.h10697 #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL … macro