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Searched refs:mmCP_MES_IC_BASE_CNTL (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v10_1.c469 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_CNTL, 0); in mes_v10_1_load_microcode()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h10275 #define mmCP_MES_IC_BASE_CNTL … macro
H A Dgc_10_3_0_offset.h9885 #define mmCP_MES_IC_BASE_CNTL … macro