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Searched refs:mmCP_HQD_ACTIVE (Results 1 – 20 of 20) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/inc/
H A Dpolaris10_pwrvirus.h1545 { 0x00000000, mmCP_HQD_ACTIVE },
1548 { 0x00000001, mmCP_HQD_ACTIVE },
1550 { 0x00000000, mmCP_HQD_ACTIVE },
1553 { 0x00000001, mmCP_HQD_ACTIVE },
1555 { 0x00000000, mmCP_HQD_ACTIVE },
1558 { 0x00000001, mmCP_HQD_ACTIVE },
1560 { 0x00000000, mmCP_HQD_ACTIVE },
1563 { 0x00000001, mmCP_HQD_ACTIVE },
1565 { 0x00000000, mmCP_HQD_ACTIVE },
1568 { 0x00000001, mmCP_HQD_ACTIVE },
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v8.c236 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
379 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
500 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
H A Damdgpu_amdkfd_gfx_v7.c249 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
384 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
502 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
H A Damdgpu_amdkfd_gfx_v10.c298 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_hqd_load()
501 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_is_occupied()
629 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_destroy()
H A Damdgpu_amdkfd_gfx_v9.c307 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_gfx_v9_hqd_load()
510 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_is_occupied()
577 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_destroy()
H A Damdgpu_amdkfd_gfx_v10_3.c283 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in hqd_load_v10_3()
486 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in hqd_is_occupied_v10_3()
550 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in hqd_destroy_v10_3()
H A Dmes_v10_1.c780 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, mqd->cp_hqd_active); in mes_v10_1_queue_init_register()
H A Dgfx_v9_0.c3587 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_init_register()
3590 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_init_register()
3669 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, in gfx_v9_0_kiq_init_register()
3684 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_fini_register()
3689 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_fini_register()
3698 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v9_0_kiq_fini_register()
H A Dgfx_v7_0.c2901 if (RREG32(mmCP_HQD_ACTIVE) & 1) { in gfx_v7_0_mqd_deactivate()
2904 if (!(RREG32(mmCP_HQD_ACTIVE) & 1)) in gfx_v7_0_mqd_deactivate()
3059 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v7_0_mqd_commit()
H A Dgfx_v8_0.c4415 if (RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK) { in gfx_v8_0_deactivate_hqd()
4418 if (!(RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK)) in gfx_v8_0_deactivate_hqd()
4624 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v8_0_mqd_commit()
H A Dgfx_v10_0.c6521 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v10_0_kiq_init_register()
6541 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v10_0_kiq_init_register()
6544 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v10_0_kiq_init_register()
6614 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, in gfx_v10_0_kiq_init_register()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h569 #define mmCP_HQD_ACTIVE 0x3247 macro
H A Dgfx_7_2_d.h582 #define mmCP_HQD_ACTIVE 0x3247 macro
H A Dgfx_8_1_d.h632 #define mmCP_HQD_ACTIVE 0x3247 macro
H A Dgfx_8_0_d.h632 #define mmCP_HQD_ACTIVE 0x3247 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2823 #define mmCP_HQD_ACTIVE … macro
H A Dgc_9_2_1_offset.h3007 #define mmCP_HQD_ACTIVE … macro
H A Dgc_9_1_offset.h3051 #define mmCP_HQD_ACTIVE … macro
H A Dgc_10_1_0_offset.h5287 #define mmCP_HQD_ACTIVE … macro
H A Dgc_10_3_0_offset.h4920 #define mmCP_HQD_ACTIVE … macro