| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_stream.c | 258 return (dc->hwss.optimize_timing_for_fsft && in dc_optimize_timing_for_fsft()
259 dc->hwss.optimize_timing_for_fsft(dc, &pStream->timing, max_input_rate_in_khz)); in dc_optimize_timing_for_fsft()
314 dc->hwss.cursor_lock(dc, pipe_to_program, true); in dc_stream_set_cursor_attributes()
317 dc->hwss.set_cursor_attribute(pipe_ctx); in dc_stream_set_cursor_attributes()
318 if (dc->hwss.set_cursor_sdr_white_level) in dc_stream_set_cursor_attributes()
319 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in dc_stream_set_cursor_attributes()
323 dc->hwss.cursor_lock(dc, pipe_to_program, false); in dc_stream_set_cursor_attributes()
381 dc->hwss.cursor_lock(dc, pipe_to_program, true); in dc_stream_set_cursor_position()
384 dc->hwss.set_cursor_position(pipe_ctx); in dc_stream_set_cursor_position()
388 dc->hwss.cursor_lock(dc, pipe_to_program, false); in dc_stream_set_cursor_position()
[all …]
|
| H A D | dc.c | 297 dc->hwss.set_drr(&pipe, in dc_stream_adjust_vmin_vmax()
325 dc->hwss.get_position(&pipe, 1, &position); in dc_stream_get_crtc_position()
492 dc->hwss.program_gamut_remap(pipes); in dc_stream_set_gamut_remap()
511 dc->hwss.program_output_csc(dc, in dc_stream_program_csc_matrix()
545 dc->hwss.set_static_screen_control(pipes_affected, num_pipes_affected, params); in dc_stream_set_static_screen_params()
784 if (dc->hwss.interdependent_update_lock) in apply_ctx_interdependent_lock()
785 dc->hwss.interdependent_update_lock(dc, context, lock); in apply_ctx_interdependent_lock()
795 dc->hwss.pipe_control_lock(dc, pipe_ctx, lock); in apply_ctx_interdependent_lock()
827 if (dc->hwss.apply_ctx_for_surface) { in disable_dangling_plane()
829 dc->hwss.apply_ctx_for_surface(dc, old_stream, 0, dangling_context); in disable_dangling_plane()
[all …]
|
| H A D | dc_vm_helper.c | 42 if (dc->hwss.init_sys_ctx) { in dc_setup_system_context()
43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context()
57 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
|
| H A D | dc_link_hwss.c | 109 link->dc->hwss.edp_power_control(link, true); in dp_enable_link_phy()
110 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in dp_enable_link_phy()
232 if (link->dc->hwss.edp_backlight_control) in dp_disable_link_phy()
233 link->dc->hwss.edp_backlight_control(link, false); in dp_disable_link_phy()
235 link->dc->hwss.edp_power_control(link, false); in dp_disable_link_phy()
351 link->dc->hwss.disable_stream(&pipes[i]); in dp_retrain_link_dp_test()
370 link->dc->hwss.enable_stream(&pipes[i]); in dp_retrain_link_dp_test()
372 link->dc->hwss.unblank_stream(&pipes[i], in dp_retrain_link_dp_test()
|
| H A D | dc_link.c | 225 link->dc->hwss.edp_power_control(link, true); in dc_link_detect_sink()
226 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in dc_link_detect_sink()
1677 link->dc->hwss.edp_power_control(link, true); in enable_link_dp()
1678 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in enable_link_dp()
2579 dc->hwss.set_backlight_level( in dc_link_set_backlight_level()
3196 dc->hwss.update_info_frame(pipe_ctx); in core_link_enable_stream()
3251 dc->hwss.enable_audio_stream(pipe_ctx); in core_link_enable_stream()
3268 dc->hwss.enable_stream(pipe_ctx); in core_link_enable_stream()
3280 dc->hwss.unblank_stream(pipe_ctx, in core_link_enable_stream()
3320 dc->hwss.blank_stream(pipe_ctx); in core_link_disable_stream()
[all …]
|
| H A D | dc_surface.c | 169 dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status()
|
| H A D | dc_link_dp.c | 4018 link->dc->hwss.unblank_stream( in dc_link_dp_set_test_pattern()
4180 link->dc->hwss.update_info_frame(pipe_ctx); in dc_link_dp_set_test_pattern()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_hw_sequencer.c | 50 dc->hwss.pipe_control_lock = dce_pipe_control_lock; in dce80_hw_sequencer_construct()
51 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce80_hw_sequencer_construct()
52 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce80_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| H A D | clk_mgr.c | 93 if (dc->hwss.exit_optimized_pwr_state) in clk_mgr_exit_optimized_pwr_state()
94 dc->hwss.exit_optimized_pwr_state(dc, dc->current_state); in clk_mgr_exit_optimized_pwr_state()
110 if (dc->hwss.optimize_pwr_state) in clk_mgr_optimize_pwr_state()
111 dc->hwss.optimize_pwr_state(dc, dc->current_state); in clk_mgr_optimize_pwr_state()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_hwseq.c | 412 dc->hwss.disable_writeback(dc, wb_info.dwb_pipe_inst); in dcn30_program_all_writeback_pipes_in_tree()
420 dc->hwss.update_writeback(dc, &wb_info, context); in dcn30_program_all_writeback_pipes_in_tree()
423 dc->hwss.enable_writeback(dc, &wb_info, context); in dcn30_program_all_writeback_pipes_in_tree()
427 dc->hwss.disable_writeback(dc, wb_info.dwb_pipe_inst); in dcn30_program_all_writeback_pipes_in_tree()
579 dc->hwss.edp_backlight_control && in dcn30_init_hw()
580 dc->hwss.power_down && in dcn30_init_hw()
581 dc->hwss.edp_power_control) { in dcn30_init_hw()
582 dc->hwss.edp_backlight_control(edp_link, false); in dcn30_init_hw()
583 dc->hwss.power_down(dc); in dcn30_init_hw()
584 dc->hwss.edp_power_control(edp_link, false); in dcn30_init_hw()
[all …]
|
| H A D | dcn30_init.c | 138 dc->hwss = dcn30_funcs; in dcn30_hw_sequencer_construct()
142 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn30_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_hw_sequencer.c | 411 dc->hwss.update_plane_addr(dc, pipe_ctx); in dce60_apply_ctx_for_surface()
426 dc->hwss.apply_ctx_for_surface = dce60_apply_ctx_for_surface; in dce60_hw_sequencer_construct()
427 dc->hwss.cursor_lock = dce60_pipe_control_lock; in dce60_hw_sequencer_construct()
428 dc->hwss.pipe_control_lock = dce60_pipe_control_lock; in dce60_hw_sequencer_construct()
429 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce60_hw_sequencer_construct()
430 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce60_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce100/ |
| H A D | dce100_hw_sequencer.c | 139 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce100_hw_sequencer_construct()
140 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce100_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 572 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx); in dcn20_plane_atomic_disable()
580 dc->hwss.set_flip_control_gsl(pipe_ctx, false); in dcn20_plane_atomic_disable()
1023 dc->hwss.set_abm_immediate_disable(pipe_ctx); in dcn20_blank_pixel_data()
1058 dc->hwss.set_pipe(pipe_ctx); in dcn20_blank_pixel_data()
1474 dc->hwss.set_cursor_position(pipe_ctx); in dcn20_update_dchubp_dpp()
1475 dc->hwss.set_cursor_attribute(pipe_ctx); in dcn20_update_dchubp_dpp()
1477 if (dc->hwss.set_cursor_sdr_white_level) in dcn20_update_dchubp_dpp()
1478 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in dcn20_update_dchubp_dpp()
1504 dc->hwss.program_gamut_remap(pipe_ctx); in dcn20_update_dchubp_dpp()
1520 dc->hwss.program_gamut_remap(pipe_ctx); in dcn20_update_dchubp_dpp()
[all …]
|
| H A D | dcn20_init.c | 138 dc->hwss = dcn20_funcs; in dcn20_hw_sequencer_construct()
142 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn20_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 108 dc->hwss.pipe_control_lock(dc, pipe_ctx, true); in dcn10_lock_all_pipes()
110 dc->hwss.pipe_control_lock(dc, pipe_ctx, false); in dcn10_lock_all_pipes()
772 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, old_pipe_ctx); in false_optc_underflow_wa()
899 dc->hwss.disable_audio_stream(pipe_ctx); in dcn10_reset_back_end_for_pipe()
923 dc->hwss.set_abm_immediate_disable(pipe_ctx); in dcn10_reset_back_end_for_pipe()
1112 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx); in dcn10_plane_atomic_disable()
1252 dc->hwss.disable_plane(dc, pipe_ctx); in dcn10_init_pipes()
1473 dc->hwss.power_down && in dcn10_power_down_on_boot()
1474 dc->hwss.edp_power_control) { in dcn10_power_down_on_boot()
1476 dc->hwss.power_down(dc); in dcn10_power_down_on_boot()
[all …]
|
| H A D | dcn10_init.c | 121 dc->hwss = dcn10_funcs; in dcn10_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_init.c | 144 dc->hwss = dcn21_funcs; in dcn21_hw_sequencer_construct()
148 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn21_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_hw_sequencer.c | 269 dc->hwss.update_dchub = dce120_update_dchub; in dce120_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_hw_sequencer.c | 674 dc->hwss.update_info_frame(pipe_ctx); in dce110_enable_stream()
1105 dc->hwss.disable_audio_stream(pipe_ctx); in dce110_disable_stream()
1142 link->dc->hwss.set_abm_immediate_disable(pipe_ctx); in dce110_blank_stream()
1590 dc->hwss.disable_plane(dc, in disable_vga_and_power_gate_all_controllers()
1688 dc->hwss.edp_power_control(edp_link_with_sink, false); in dce110_enable_accelerated_mode()
2008 dc->hwss.disable_plane(dc, pipe_ctx_old); in dce110_reset_hw_ctx_wrap()
2679 dc->hwss.update_plane_addr(dc, pipe_ctx); in dce110_apply_ctx_for_surface()
2922 dc->hwss = dce110_funcs; in dce110_hw_sequencer_construct()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 2279 if (!dc->hwss.log_hw_state) in dtn_log_read()
2282 dc->hwss.log_hw_state(dc, &log_ctx); in dtn_log_read()
2317 if (dc->hwss.log_hw_state) in dtn_log_write()
2318 dc->hwss.log_hw_state(dc, NULL); in dtn_log_write()
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 596 struct hw_sequencer_funcs hwss; member
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_hwseq.h | 841 void dce_enable_fe_clock(struct dce_hwseq *hwss,
|