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Searched refs:feature_mask (Results 1 – 25 of 54) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_cmn.c320 uint32_t *feature_mask, in smu_cmn_get_enabled_mask() argument
327 if (!feature_mask || num < 2) in smu_cmn_get_enabled_mask()
339 feature_mask[0] = feature_mask_low; in smu_cmn_get_enabled_mask()
340 feature_mask[1] = feature_mask_high; in smu_cmn_get_enabled_mask()
342 bitmap_copy((unsigned long *)feature_mask, feature->enabled, in smu_cmn_get_enabled_mask()
350 uint64_t feature_mask, in smu_cmn_feature_update_enable_state() argument
359 lower_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
365 upper_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
372 lower_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
378 upper_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
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H A Dsmu_cmn.h52 uint32_t *feature_mask,
56 uint64_t feature_mask,
H A Dsmu_internal.h75 …e smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mask, 0,… argument
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr.c106 hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
117 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
122 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
127 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
135 hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK; in hwmgr_early_init()
140 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
148 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
153 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
164 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
174 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
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H A Dvega10_hwmgr.c121 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
123 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
125 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
127 hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; in vega10_set_default_registry_data()
130 hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
132 if (hwmgr->feature_mask & PP_POWER_CONTAINMENT_MASK) { in vega10_set_default_registry_data()
139 hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false; in vega10_set_default_registry_data()
142 hwmgr->feature_mask & PP_ULV_MASK ? true : false; in vega10_set_default_registry_data()
145 hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false; in vega10_set_default_registry_data()
154 hwmgr->feature_mask & PP_AVFS_MASK ? true : false; in vega10_set_default_registry_data()
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H A Dvega20_hwmgr.c104 if (!(hwmgr->feature_mask & PP_PCIE_DPM_MASK)) in vega20_set_default_registry_data()
107 if (!(hwmgr->feature_mask & PP_SCLK_DPM_MASK)) in vega20_set_default_registry_data()
110 if (!(hwmgr->feature_mask & PP_SOCCLK_DPM_MASK)) in vega20_set_default_registry_data()
113 if (!(hwmgr->feature_mask & PP_MCLK_DPM_MASK)) in vega20_set_default_registry_data()
116 if (!(hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK)) in vega20_set_default_registry_data()
119 if (!(hwmgr->feature_mask & PP_ULV_MASK)) in vega20_set_default_registry_data()
122 if (!(hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK)) in vega20_set_default_registry_data()
174 data->registry_data.pcie_dpm_key_disabled = !(hwmgr->feature_mask & PP_PCIE_DPM_MASK); in vega20_set_default_registry_data()
1817 static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_min_level() argument
1825 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_min_level()
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/OK3568_Linux_fs/kernel/arch/arm64/kernel/
H A Dalternative.c137 unsigned long *feature_mask) in __apply_alternatives() argument
147 if (!test_bit(alt->cpufeature, feature_mask)) in __apply_alternatives()
190 feature_mask, ARM64_NCAPS); in __apply_alternatives()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c256 uint32_t *feature_mask, uint32_t num) in navi10_get_allowed_feature_mask() argument
263 memset(feature_mask, 0, sizeof(uint32_t) * num); in navi10_get_allowed_feature_mask()
265 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in navi10_get_allowed_feature_mask()
287 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
290 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in navi10_get_allowed_feature_mask()
293 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in navi10_get_allowed_feature_mask()
296 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); in navi10_get_allowed_feature_mask()
299 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
302 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); in navi10_get_allowed_feature_mask()
305 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT); in navi10_get_allowed_feature_mask()
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H A Dsienna_cichlid_ppt.c226 uint32_t *feature_mask, uint32_t num) in sienna_cichlid_get_allowed_feature_mask() argument
233 memset(feature_mask, 0, sizeof(uint32_t) * num); in sienna_cichlid_get_allowed_feature_mask()
235 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in sienna_cichlid_get_allowed_feature_mask()
257 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
258 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT); in sienna_cichlid_get_allowed_feature_mask()
262 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) in sienna_cichlid_get_allowed_feature_mask()
267 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in sienna_cichlid_get_allowed_feature_mask()
270 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
273 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
276 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); in sienna_cichlid_get_allowed_feature_mask()
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H A Darcturus_ppt.c289 uint32_t *feature_mask, uint32_t num) in arcturus_get_allowed_feature_mask() argument
295 memset(feature_mask, 0xFF, sizeof(uint32_t) * num); in arcturus_get_allowed_feature_mask()
847 uint32_t feature_mask, in arcturus_upload_dpm_level() argument
856 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in arcturus_upload_dpm_level()
870 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in arcturus_upload_dpm_level()
884 (feature_mask & FEATURE_DPM_SOCCLK_MASK)) { in arcturus_upload_dpm_level()
1853 uint32_t feature_mask[2]; in arcturus_is_dpm_running() local
1856 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in arcturus_is_dpm_running()
1860 feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; in arcturus_is_dpm_running()
2207 uint32_t feature_mask; member
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H A Dsmu_v11_0.c717 uint32_t feature_mask[2]; in smu_v11_0_set_allowed_mask() local
722 bitmap_copy((unsigned long *)feature_mask, feature->allowed, 64); in smu_v11_0_set_allowed_mask()
725 feature_mask[1], NULL); in smu_v11_0_set_allowed_mask()
730 feature_mask[0], NULL); in smu_v11_0_set_allowed_mask()
742 uint32_t feature_mask[2]; in smu_v11_0_system_features_control() local
754 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in smu_v11_0_system_features_control()
758 bitmap_copy(feature->enabled, (unsigned long *)&feature_mask, in smu_v11_0_system_features_control()
760 bitmap_copy(feature->supported, (unsigned long *)&feature_mask, in smu_v11_0_system_features_control()
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dkempld-core.c67 pld->feature_mask = kempld_read16(pld, KEMPLD_FEATURE); in kempld_get_info_generic()
69 pld->feature_mask = 0; in kempld_get_info_generic()
97 if (pld->feature_mask & KEMPLD_FEATURE_BIT_I2C) in kempld_register_cells_generic()
100 if (pld->feature_mask & KEMPLD_FEATURE_BIT_WATCHDOG) in kempld_register_cells_generic()
103 if (pld->feature_mask & KEMPLD_FEATURE_BIT_GPIO) in kempld_register_cells_generic()
106 if (pld->feature_mask & KEMPLD_FEATURE_MASK_UART) in kempld_register_cells_generic()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_rkv.c423 …_segid_grp[i].sw_vp9segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mask[i]) & 0x1; in hal_vp9d_rkv_gen_regs()
425 …d_grp[i].sw_vp9segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mask[i] >> 1) & 0x1; in hal_vp9d_rkv_gen_regs()
427 …d_grp[i].sw_vp9segid_referinfo_en = (hw_ctx->ls_info.feature_mask[i] >> 2) & 0x1; in hal_vp9d_rkv_gen_regs()
429 …d_grp[i].sw_vp9segid_frame_skip_en = (hw_ctx->ls_info.feature_mask[i] >> 3) & 0x1; in hal_vp9d_rkv_gen_regs()
498 hw_ctx->ls_info.feature_mask[i] = pic_param->stVP9Segments.feature_mask[i]; in hal_vp9d_rkv_gen_regs()
H A Dhal_vp9d_ctx.h36 RK_U8 feature_mask[8]; member
H A Dhal_vp9d_vdpu382.c752 …->vp9d_param.reg67_74[i].segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mask[i]) & 0x1; in hal_vp9d_vdpu382_gen_regs()
754 …d_param.reg67_74[i].segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mask[i] >> 1) & 0x1; in hal_vp9d_vdpu382_gen_regs()
756 …d_param.reg67_74[i].segid_referinfo_en = (hw_ctx->ls_info.feature_mask[i] >> 2) & 0x1; in hal_vp9d_vdpu382_gen_regs()
758 …d_param.reg67_74[i].segid_frame_skip_en = (hw_ctx->ls_info.feature_mask[i] >> 3) & 0x1; in hal_vp9d_vdpu382_gen_regs()
829 hw_ctx->ls_info.feature_mask[i] = pic_param->stVP9Segments.feature_mask[i]; in hal_vp9d_vdpu382_gen_regs()
H A Dhal_vp9d_vdpu34x.c742 …->vp9d_param.reg67_74[i].segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mask[i]) & 0x1; in hal_vp9d_vdpu34x_gen_regs()
744 …d_param.reg67_74[i].segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mask[i] >> 1) & 0x1; in hal_vp9d_vdpu34x_gen_regs()
746 …d_param.reg67_74[i].segid_referinfo_en = (hw_ctx->ls_info.feature_mask[i] >> 2) & 0x1; in hal_vp9d_vdpu34x_gen_regs()
748 …d_param.reg67_74[i].segid_frame_skip_en = (hw_ctx->ls_info.feature_mask[i] >> 3) & 0x1; in hal_vp9d_vdpu34x_gen_regs()
812 hw_ctx->ls_info.feature_mask[i] = pic_param->stVP9Segments.feature_mask[i]; in hal_vp9d_vdpu34x_gen_regs()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvega10_smumgr.h46 bool enable, uint32_t feature_mask);
H A Dvega12_smumgr.h52 bool enable, uint64_t feature_mask);
H A Dvega20_smumgr.h51 bool enable, uint64_t feature_mask);
H A Dvega12_smumgr.c127 bool enable, uint64_t feature_mask) in vega12_enable_smc_features() argument
131 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega12_enable_smc_features()
132 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega12_enable_smc_features()
H A Dvega20_smumgr.c320 bool enable, uint64_t feature_mask) in vega20_enable_smc_features() argument
325 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega20_enable_smc_features()
326 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega20_enable_smc_features()
/OK3568_Linux_fs/kernel/drivers/net/
H A Dtap.c927 netdev_features_t feature_mask = 0; in set_offload() local
936 feature_mask = NETIF_F_HW_CSUM; in set_offload()
940 feature_mask |= NETIF_F_TSO_ECN; in set_offload()
942 feature_mask |= NETIF_F_TSO; in set_offload()
944 feature_mask |= NETIF_F_TSO6; in set_offload()
956 if (feature_mask & (NETIF_F_TSO | NETIF_F_TSO6)) in set_offload()
964 tap->tap_features = feature_mask; in set_offload()
/OK3568_Linux_fs/kernel/arch/x86/mm/
H A Dmem_encrypt_identity.c500 unsigned long feature_mask; in sme_enable() local
535 feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT; in sme_enable()
538 if (feature_mask == AMD_SME_BIT) { in sme_enable()
/OK3568_Linux_fs/external/mpp/mpp/codec/dec/vp9/
H A Dvp9d_parser2_syntax.c52 seg->feature_mask[i] = s->segmentation.feat[i].q_enabled in vp9d_fill_segmentation()
64 mpp_log("seg->feature_mask[%d] = 0x%x", i, seg->feature_mask[i]); in vp9d_fill_segmentation()
/OK3568_Linux_fs/kernel/include/linux/mfd/
H A Dkempld.h91 u32 feature_mask; member

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