Searched refs:dsc_cds_clk_rate (Results 1 – 4 of 4) sorted by relevance
193 u64 dsc_cds_clk_rate; member
2646 if_pixclk_rate = cstate->dsc_cds_clk_rate << 1; in vop2_calc_cru_cfg()2647 if_dclk_rate = cstate->dsc_cds_clk_rate; in vop2_calc_cru_cfg()2693 if_pixclk_rate = cstate->dsc_cds_clk_rate >> 1; in vop2_calc_cru_cfg()2753 cstate->dsc_cds_clk_rate = v_pixclk / (cstate->dsc_txp_clk_rate == v_pixclk ? 4 : 8); in vop2_calc_dsc_clk()3263 *dsc_cds_clk_div = dclk_rate / cstate->dsc_cds_clk_rate; in vop2_calc_dsc_cru_cfg()3383 u64 dsc_cds_rate = cstate->dsc_cds_clk_rate; in vop2_dsc_enable()3479 cstate->dsc_cds_clk_rate, dsc_cds_clk_div); in vop2_dsc_enable()
288 u64 dsc_cds_clk_rate; member
7073 clk_set_rate(dsc_cds_clk->hw.clk, vcstate->dsc_cds_clk_rate); in vop2_set_dsc_clk()7114 hdmi_edp_pixclk = vcstate->dsc_cds_clk_rate << 1; in vop2_calc_if_clk()7115 hdmi_edp_dclk = vcstate->dsc_cds_clk_rate; in vop2_calc_if_clk()7137 mipi_pixclk = vcstate->dsc_cds_clk_rate >> 1; in vop2_calc_if_clk()7248 vcstate->dsc_cds_clk_rate = v_pixclk / (vcstate->dsc_txp_clk_rate == v_pixclk ? 4 : 8); in vop2_calc_dsc_clk()7403 u64 dsc_cds_rate = vcstate->dsc_cds_clk_rate; in vop2_crtc_enable_dsc()7504 vcstate->dsc_cds_clk_rate, dsc_cds_clk->div_val); in vop2_crtc_enable_dsc()