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Searched refs:dpm_level (Results 1 – 18 of 18) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr_smu_msg.c249 …t dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, uint8_t dpm_level) in dcn30_smu_get_dpm_freq_by_index() argument
254 uint32_t param = (clk << 16) | dpm_level; in dcn30_smu_get_dpm_freq_by_index()
256 smu_print("SMU Get dpm freq by index: clk = %d, dpm_level = %d\n", clk, dpm_level); in dcn30_smu_get_dpm_freq_by_index()
H A Ddcn30_clk_mgr_smu_msg.h101 … dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, uint8_t dpm_level);
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c178 uint32_t dpm_level, uint32_t *freq) in renoir_get_dpm_clk_limited() argument
187 if (dpm_level >= NUM_SOCCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
189 *freq = clk_table->SocClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
193 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
195 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
198 if (dpm_level >= NUM_DCFCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
200 *freq = clk_table->DcfClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
203 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
205 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.c356 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()
367 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()
368 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()
369 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()
380 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()
451 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
H A Dpp_psm.c283 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()
285 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
H A Dvega12_hwmgr.c2352 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()
2357 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2376 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()
2381 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2420 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2439 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2458 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2477 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
H A Dppatomctrl.h305 uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug);
H A Dvega20_hwmgr.c3752 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega20_apply_clocks_adjust_rules()
3757 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3776 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega20_apply_clocks_adjust_rules()
3781 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3836 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3855 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3874 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3893 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
H A Dhwmgr.c91 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
H A Dppatomctrl.c646 uint16_t dpm_level, in atomctrl_calculate_voltage_evv_on_sclk() argument
695 switch (dpm_level) { in atomctrl_calculate_voltage_evv_on_sclk()
H A Dvega10_hwmgr.c4312 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in vega10_dpm_force_dpm_level()
4314 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in vega10_dpm_force_dpm_level()
4643 (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) in vega10_print_clock_levels()
H A Dsmu7_hwmgr.c2939 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in smu7_force_dpm_level()
2941 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in smu7_force_dpm_level()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c504 smu->smu_dpm.dpm_level, in smu_late_init()
835 smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in smu_sw_init()
1478 if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { in smu_enable_umd_pstate()
1481 smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; in smu_enable_umd_pstate()
1543 if (smu_dpm_ctx->dpm_level != level) { in smu_adjust_power_state_dynamic()
1551 smu_dpm_ctx->dpm_level = level; in smu_adjust_power_state_dynamic()
1554 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_adjust_power_state_dynamic()
1632 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_switch_power_profile()
1652 level = smu_dpm_ctx->dpm_level; in smu_get_performance_level()
1710 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_force_clk_levels()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c320 if (!(hwmgr->dpm_level & profile_mode_mask)) { in pp_dpm_en_umd_pstate()
323 hwmgr->saved_dpm_level = hwmgr->dpm_level; in pp_dpm_en_umd_pstate()
356 if (level == hwmgr->dpm_level) in pp_dpm_force_performance_level()
378 level = hwmgr->dpm_level; in pp_dpm_get_performance_level()
729 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_dpm_force_clock_level()
903 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_set_power_profile_mode()
998 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_switch_power_profile()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/inc/
H A Dhwmgr.h63 struct vi_dpm_level dpm_level[1]; member
766 enum amd_dpm_forced_level dpm_level; member
H A Damdgpu_smu.h288 enum amd_dpm_forced_level dpm_level; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dci_smumgr.c2882 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
2914 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c1563 smu_dpm->dpm_level, in amdgpu_pm_compute_clocks()