Searched refs:dpcd_caps (Results 1 – 12 of 12) sorted by relevance
78 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_eq_training_aux_rd_interval()134 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in decide_eq_training_pattern() local142 if (dpcd_caps->max_down_spread.bits.TPS4_SUPPORTED && in decide_eq_training_pattern()146 if (dpcd_caps->max_ln_count.bits.TPS3_SUPPORTED && in decide_eq_training_pattern()174 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dpcd_set_link_settings()183 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_14 && in dpcd_set_link_settings()960 link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]); in perform_channel_equalization_sequence()1134 if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 || in perform_link_training_int()1331 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode()1345 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode()[all …]
657 if (link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) { in read_current_link_settings_on_detect()659 link->dpcd_caps.edp_supported_link_rates[link_rate_set]; in read_current_link_settings_on_detect()749 if (!link->dpcd_caps.sink_count.bits.SINK_COUNT) { in detect_dp()757 if (link->dpcd_caps.dongle_type != in detect_dp()766 link->dpcd_caps.dongle_type = sink_caps->dongle_type; in detect_dp()854 struct dpcd_caps prev_dpcd_caps; in dc_link_detect_helper()887 memcpy(&prev_dpcd_caps, &link->dpcd_caps, sizeof(struct dpcd_caps)); in dc_link_detect_helper()952 if (memcmp(&link->dpcd_caps, &prev_dpcd_caps, in dc_link_detect_helper()953 sizeof(struct dpcd_caps))) in dc_link_detect_helper()958 link->dpcd_caps.sink_count.bits.SINK_COUNT == 0) { in dc_link_detect_helper()[all …]
284 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()285 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()287 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
46 return (convert_to_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == offset); in is_immediate_downstream()
238 link->link_status.dpcd_caps = &link->dpcd_caps; in create_links()
40 struct dpcd_caps *dpcd_caps; member142 struct dpcd_caps dpcd_caps; member
1046 struct dpcd_caps { struct
340 (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER || in get_protection_properties_by_signal()341 link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) { in get_protection_properties_by_signal()
159 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in needs_dsc_aux_workaround()160 (link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) && in needs_dsc_aux_workaround()161 link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2) in needs_dsc_aux_workaround()
1006 struct dpcd_caps dpcd_caps; in dp_dsc_fec_support_show() local1026 dpcd_caps = aconnector->dc_link->dpcd_caps; in dp_dsc_fec_support_show()1038 is_fec_supported = dpcd_caps.fec_cap.raw & 0x1; in dp_dsc_fec_support_show()1039 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
456 link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw; in update_config()
134 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type()2450 if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) { in dm_handle_hpd_rx_irq()4834 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw, in create_stream_for_sink()4835 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw, in create_stream_for_sink()4892 if (stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) in create_stream_for_sink()9205 link->dpcd_caps.psr_caps.psr_version = dpcd_data[0]; in amdgpu_dm_set_psr_caps()9237 psr_config.psr_version = link->dpcd_caps.psr_caps.psr_version; in amdgpu_dm_link_setup_psr()