Searched refs:XCHAL_NUM_IBREAK (Results 1 – 16 of 16) sorted by relevance
18 static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[XCHAL_NUM_IBREAK]);27 return XCHAL_NUM_IBREAK; in hw_breakpoint_slots()98 BUILD_BUG_ON(XCHAL_NUM_IBREAK > 2); in xtensa_wsr()102 #if XCHAL_NUM_IBREAK > 0 in xtensa_wsr()107 #if XCHAL_NUM_IBREAK > 1 in xtensa_wsr()177 i = alloc_slot(this_cpu_ptr(bp_on_reg), XCHAL_NUM_IBREAK, bp); in arch_install_hw_breakpoint()215 i = free_slot(this_cpu_ptr(bp_on_reg), XCHAL_NUM_IBREAK, bp); in arch_uninstall_hw_breakpoint()238 for (i = 0; i < XCHAL_NUM_IBREAK; ++i) { in flush_ptrace_hw_breakpoint()282 for (i = 0; i < XCHAL_NUM_IBREAK; ++i) { in check_hw_breakpoint()
374 for (i = 0; i < XCHAL_NUM_IBREAK; ++i) in ptrace_hbptriggered()424 if ((!dbreak && idx >= XCHAL_NUM_IBREAK) || in ptrace_gethbpregs()460 if ((!dbreak && idx >= XCHAL_NUM_IBREAK) || in ptrace_sethbpregs()
546 #if XCHAL_NUM_IBREAK > 0 in cpu_reset()669 XCHAL_NUM_IBREAK, in c_show()
122 #if XCHAL_NUM_IBREAK > 0
153 struct perf_event *ptrace_bp[XCHAL_NUM_IBREAK];
327 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
352 #define XCHAL_NUM_IBREAK 0 /* number of IBREAKn regs */ macro
391 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
392 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
421 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
442 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
488 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
531 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro
552 #define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ macro