Searched refs:UVD_MPC_SET_MUXA0__VARA_3__SHIFT (Results 1 – 14 of 14) sorted by relevance
601 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
484 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
503 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x00000012 macro
488 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
520 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
522 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
1108 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
2849 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
2614 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
3922 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
832 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v1_0_start_spg_mode()1015 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v1_0_start_dpg_mode()
823 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_5_start_dpg_mode()977 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_5_start()
845 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_0_start_dpg_mode()980 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_0_start()
947 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v3_0_start_dpg_mode()1104 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v3_0_start()