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Searched refs:UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h468 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
H A Duvd_4_0_sh_mask.h489 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x00000003 macro
H A Duvd_4_2_sh_mask.h472 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
H A Duvd_5_0_sh_mask.h504 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
H A Duvd_6_0_sh_mask.h506 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1102 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2830 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2595 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3901 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c826 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v1_0_start_spg_mode()
1010 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0xFFFFFFFF, 0); in vcn_v1_0_start_dpg_mode()
H A Dvcn_v2_5.c817 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v2_5_start_dpg_mode()
970 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v2_5_start()
H A Dvcn_v2_0.c839 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v2_0_start_dpg_mode()
973 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v2_0_start()
H A Dvcn_v3_0.c941 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v3_0_start_dpg_mode()
1097 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v3_0_start()