Searched refs:STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE (Results 1 – 2 of 2) sorted by relevance
56 #define STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE (1 << 12) macro
627 reg_val |= STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE; in tegra_dc_sor_config_panel()