Searched refs:SSP_CR1_MASK_TENDN_ST (Results 1 – 1 of 1) sorted by relevance
123 #define SSP_CR1_MASK_TENDN_ST (0x1UL << 5) macro617 GEN_MASK_BITS(SSP_TX_MSB, SSP_CR1_MASK_TENDN_ST, 5) | \632 GEN_MASK_BITS(SSP_TX_MSB, SSP_CR1_MASK_TENDN_ST, 5) | \2030 SSP_WRITE_BITS(chip->cr1, etx, SSP_CR1_MASK_TENDN_ST, 5); in pl022_setup()