Searched refs:SGMII_REF_CLK_SEL_REG (Results 1 – 2 of 2) sorted by relevance
847 reg_write(SGMII_REF_CLK_SEL_REG(0), 0x400); in serdes_phy_config()848 DEBUG_WR_REG(SGMII_REF_CLK_SEL_REG(0), 0x400); in serdes_phy_config()882 reg_write(SGMII_REF_CLK_SEL_REG(sgmii_port), 0x400); in serdes_phy_config()883 DEBUG_WR_REG(SGMII_REF_CLK_SEL_REG(sgmii_port), 0x400); in serdes_phy_config()
153 #define SGMII_REF_CLK_SEL_REG(port) (MV_ETH_REGS_BASE(port) + 0xF18) macro