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Searched refs:SET_C2H_FIELD_CLR (Results 1 – 17 of 17) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/halmac/
H A Dhalmac_original_c2h_ap.h35 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
40 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
45 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
50 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
55 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
60 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
65 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
70 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 8, 8, value)
75 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 8, value)
80 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 24, 8, value)
[all …]
H A Dhalmac_fw_offload_c2h_ap.h112 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
117 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
122 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
127 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
132 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
137 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
143 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
149 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 16, value)
154 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 0, 8, value)
159 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 8, 8, value)
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H A Dhalmac_h2c_extra_info_ap.h37 SET_C2H_FIELD_CLR(extra_info + 0X00, 0, 8, value)
42 SET_C2H_FIELD_CLR(extra_info + 0X00, 8, 7, value)
48 SET_C2H_FIELD_CLR(extra_info + 0X00, 15, 1, value)
54 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
60 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
66 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
72 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
78 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
84 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
90 SET_C2H_FIELD_CLR(extra_info + 0X00, 24, 8, value)
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H A Dhalmac_type.h414 #ifndef SET_C2H_FIELD_CLR
415 #define SET_C2H_FIELD_CLR SET_BITS_TO_LE_4BYTE macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/halmac/
H A Dhalmac_original_c2h_ap.h34 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
39 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
44 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
49 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
54 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
59 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
64 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
69 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 8, 8, value)
74 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 8, value)
79 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 24, 8, value)
[all …]
H A Dhalmac_fw_offload_c2h_ap.h111 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
116 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
121 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
126 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
131 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
136 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
142 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
148 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 16, value)
153 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 0, 8, value)
158 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 8, 8, value)
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H A Dhalmac_h2c_extra_info_ap.h36 SET_C2H_FIELD_CLR(extra_info + 0X00, 0, 8, value)
41 SET_C2H_FIELD_CLR(extra_info + 0X00, 8, 7, value)
47 SET_C2H_FIELD_CLR(extra_info + 0X00, 15, 1, value)
53 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
59 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
65 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
71 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
77 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
83 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
89 SET_C2H_FIELD_CLR(extra_info + 0X00, 24, 8, value)
[all …]
H A Dhalmac_type.h413 #ifndef SET_C2H_FIELD_CLR
414 #define SET_C2H_FIELD_CLR SET_BITS_TO_LE_4BYTE macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/halmac/
H A Dhalmac_original_c2h_ap.h34 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
39 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
44 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
49 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
54 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
59 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
64 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
69 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 8, 8, value)
74 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 8, value)
79 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 24, 8, value)
[all …]
H A Dhalmac_fw_offload_c2h_ap.h111 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
116 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
121 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
126 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 24, 8, value)
131 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
136 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
142 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 0, 8, value)
148 SET_C2H_FIELD_CLR(c2h_pkt + 0X04, 16, 16, value)
153 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 0, 8, value)
158 SET_C2H_FIELD_CLR(c2h_pkt + 0X08, 8, 8, value)
[all …]
H A Dhalmac_h2c_extra_info_ap.h36 SET_C2H_FIELD_CLR(extra_info + 0X00, 0, 8, value)
41 SET_C2H_FIELD_CLR(extra_info + 0X00, 8, 7, value)
47 SET_C2H_FIELD_CLR(extra_info + 0X00, 15, 1, value)
53 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
59 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
65 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
71 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 8, value)
77 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
83 SET_C2H_FIELD_CLR(extra_info + 0X00, 16, 16, value)
89 SET_C2H_FIELD_CLR(extra_info + 0X00, 24, 8, value)
[all …]
H A Dhalmac_type.h413 #ifndef SET_C2H_FIELD_CLR
414 #define SET_C2H_FIELD_CLR SET_BITS_TO_LE_4BYTE macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/halmac/
H A Dhalmac_original_c2h_ap.h17 #define C2H_SET_CMD_ID(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 0, 8, __Value)
20 #define C2H_SET_SEQ(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 8, 8, __Value)
23 #define DBG_SET_CMD_ID(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 0, 8, __Value)
26 #define DBG_SET_SEQ(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 8, 8, __Value)
29 #define DBG_SET_DBG_STR1(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 16, 8, __Value)
32 #define DBG_SET_DBG_STR2(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 24, 8, __Value)
35 #define DBG_SET_DBG_STR3(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 0, 8, __Value)
38 #define DBG_SET_DBG_STR4(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 8, 8, __Value)
41 #define DBG_SET_DBG_STR5(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 16, 8, __Value)
44 #define DBG_SET_DBG_STR6(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 24, 8, __Value)
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H A Dhalmac_fw_offload_c2h_ap.h41 #define C2H_HDR_SET_CMD_ID(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 0, 8, __Value)
44 #define C2H_HDR_SET_SEQ(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 8, 8, __Value)
47 #define C2H_HDR_SET_C2H_SUB_CMD_ID(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 16, 8, __Va…
50 #define C2H_HDR_SET_LEN(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X00, 24, 8, __Value)
53 #define C2H_DBG_SET_DBG_MSG(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 0, 8, __Value)
56 #define BT_COEX_INFO_SET_DATA_START(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 0, 8, __Va…
59 #define SCAN_STATUS_RPT_SET_H2C_RETURN_CODE(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 0,…
62 #define SCAN_STATUS_RPT_SET_H2C_SEQ(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 16, 16, __…
65 #define H2C_ACK_HDR_SET_H2C_RETURN_CODE(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 0, 8, …
68 #define H2C_ACK_HDR_SET_H2C_CMD_ID(__pC2H, __Value) SET_C2H_FIELD_CLR(__pC2H + 0X04, 8, 8, __Val…
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H A Dhalmac_h2c_extra_info_ap.h5 #define PHY_PARAMETER_INFO_SET_LENGTH(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0X…
8 #define PHY_PARAMETER_INFO_SET_IO_CMD(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0X…
11 #define PHY_PARAMETER_INFO_SET_MSK_EN(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0X…
14 #define PHY_PARAMETER_INFO_SET_LLT_PG_BNDY(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo…
17 #define PHY_PARAMETER_INFO_SET_EFUSE_RSVDPAGE_LOC(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pEx…
20 #define PHY_PARAMETER_INFO_SET_EFUSE_PATCH_EN(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraI…
23 #define PHY_PARAMETER_INFO_SET_RF_ADDR(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0…
26 #define PHY_PARAMETER_INFO_SET_IO_ADDR(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0…
29 #define PHY_PARAMETER_INFO_SET_DELAY_VALUE(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo…
32 #define PHY_PARAMETER_INFO_SET_RF_PATH(__pExtraInfo, __Value) SET_C2H_FIELD_CLR(__pExtraInfo + 0…
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H A Dhalmac_type.h246 #ifndef SET_C2H_FIELD_CLR
247 #define SET_C2H_FIELD_CLR SET_BITS_TO_LE_4BYTE macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/halmac/
H A Dhalmac_type.h413 #ifndef SET_C2H_FIELD_CLR
414 #define SET_C2H_FIELD_CLR SET_BITS_TO_LE_4BYTE macro