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Searched refs:SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1137 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h1145 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK 0x00000001L macro
H A Dsdma0_4_2_sh_mask.h1149 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK … macro
H A Dsdma0_4_2_2_sh_mask.h1159 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1089 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK 0x1 macro
H A Doss_2_4_sh_mask.h1193 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK 0x1 macro
H A Doss_3_0_1_sh_mask.h1603 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK 0x1 macro
H A Doss_3_0_sh_mask.h1925 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK 0x1 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h929 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h934 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE_MASK … macro