Searched refs:RXTX_REG99_MU_PHASE2_SET (Results 1 – 1 of 1) sorted by relevance
429 #define RXTX_REG99_MU_PHASE2_SET(dst, src) \ macro1081 val = RXTX_REG99_MU_PHASE2_SET(val, 0x7); in xgene_phy_sata_cfg_lanes()