Searched refs:RP_VEND_CTL0_DSK_RST_PULSE_WIDTH (Results 1 – 1 of 1) sorted by relevance
218 #define RP_VEND_CTL0_DSK_RST_PULSE_WIDTH (0x9 << 12) macro650 value |= RP_VEND_CTL0_DSK_RST_PULSE_WIDTH; in tegra_pcie_apply_sw_fixup()