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Searched refs:REG_TRAINING_WL_ADDR (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c784 reg = reg_read(REG_TRAINING_WL_ADDR) | in ddr3_write_leveling_sw()
787 reg_write(REG_TRAINING_WL_ADDR, reg); in ddr3_write_leveling_sw()
1019 reg = reg_read(REG_TRAINING_WL_ADDR) | in ddr3_write_leveling_sw_reg_dimm()
1022 reg_write(REG_TRAINING_WL_ADDR, reg); in ddr3_write_leveling_sw_reg_dimm()
1179 reg = (reg_read(REG_TRAINING_WL_ADDR) & REG_TRAINING_WL_CS_MASK) | cs; in ddr3_write_leveling_single_cs()
1182 reg_write(REG_TRAINING_WL_ADDR, reg); in ddr3_write_leveling_single_cs()
1193 reg = (reg_read(REG_TRAINING_WL_ADDR) & in ddr3_write_leveling_single_cs()
1196 reg = (reg_read(REG_TRAINING_WL_ADDR) & in ddr3_write_leveling_single_cs()
1200 reg_write(REG_TRAINING_WL_ADDR, reg); in ddr3_write_leveling_single_cs()
1205 reg = (reg_read(REG_TRAINING_WL_ADDR)) & in ddr3_write_leveling_single_cs()
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H A Dddr3_axp.h315 #define REG_TRAINING_WL_ADDR 0x16AC macro
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h289 #define REG_TRAINING_WL_ADDR 0x16ac macro