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Searched refs:REG_DDR3_MR1_WL_ENA_OFFS (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h246 #define REG_DDR3_MR1_WL_ENA_OFFS 7 macro
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h272 #define REG_DDR3_MR1_WL_ENA_OFFS 7 macro
H A Dddr3_write_leveling.c752 reg |= (1 << REG_DDR3_MR1_WL_ENA_OFFS); in ddr3_write_leveling_sw()
989 reg |= (1 << REG_DDR3_MR1_WL_ENA_OFFS); in ddr3_write_leveling_sw_reg_dimm()