Searched refs:REG_DDR3_MR1_WL_ENA (Results 1 – 2 of 2) sorted by relevance
247 #define REG_DDR3_MR1_WL_ENA 0x80 /* WL Enabled */ macro
273 #define REG_DDR3_MR1_WL_ENA 0x80 /* WL Enabled */ macro