Searched refs:PCIE_DPHY_DLY_25US (Results 1 – 2 of 2) sorted by relevance
83 #define PCIE_DPHY_DLY_25US 0x1 macro
2587 val16 = SET_CLR_WOR2(val16, PCIE_DPHY_DLY_25US, BAC_CMU_EN_DLY_SH, in _patch_pcie_dphy_delay()