Searched refs:MC_CGM_ACn_SEL_ENETPLL (Results 1 – 2 of 2) sorted by relevance
225 aux_source_clk_config(MC_CGM0_BASE_ADDR, 7, MC_CGM_ACn_SEL_ENETPLL); in setup_aux_clocks()229 aux_source_clk_config(MC_CGM2_BASE_ADDR, 2, MC_CGM_ACn_SEL_ENETPLL); in setup_aux_clocks()233 aux_source_clk_config(MC_CGM0_BASE_ADDR, 15, MC_CGM_ACn_SEL_ENETPLL); in setup_aux_clocks()
63 #define MC_CGM_ACn_SEL_ENETPLL (0x4) macro