Searched refs:IAVF_ITR_MASK (Results 1 – 2 of 2) sorted by relevance
17 #define IAVF_ITR_MASK 0x1FFE /* mask for ITR register value */ macro26 #define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~IAVF_ITR_MASK)
477 (q_vector->rx.target_itr & IAVF_ITR_MASK) == in iavf_update_itr()497 if ((itr & IAVF_ITR_MASK) > IAVF_ITR_ADAPTIVE_MAX_USECS) { in iavf_update_itr()506 itr &= IAVF_ITR_MASK; in iavf_update_itr()521 itr &= IAVF_ITR_MASK; in iavf_update_itr()595 if ((itr & IAVF_ITR_MASK) > IAVF_ITR_ADAPTIVE_MAX_USECS) { in iavf_update_itr()1613 itr &= IAVF_ITR_MASK; in iavf_buildreg_itr()