Searched refs:I915_NUM_ENGINES (Results 1 – 23 of 23) sorted by relevance
151 struct intel_vgpu_execlist execlist[I915_NUM_ENGINES];152 struct list_head workload_q_head[I915_NUM_ENGINES];153 struct intel_context *shadow[I915_NUM_ENGINES];160 DECLARE_BITMAP(shadow_ctx_desc_updated, I915_NUM_ENGINES);161 DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES);162 void *ring_scan_buffer[I915_NUM_ENGINES];163 int ring_scan_buffer_size[I915_NUM_ENGINES];171 } last_ctx[I915_NUM_ENGINES];201 u32 hws_pga[I915_NUM_ENGINES];308 struct notifier_block shadow_ctx_notifier_block[I915_NUM_ENGINES];[all …]
42 struct intel_vgpu_workload *current_workload[I915_NUM_ENGINES];47 struct intel_vgpu *engine_owner[I915_NUM_ENGINES];50 struct task_struct *thread[I915_NUM_ENGINES];51 wait_queue_head_t waitq[I915_NUM_ENGINES];
336 for (i = 0; i < I915_NUM_ENGINES; i++) in intel_gvt_create_idle_vgpu()
148 u32 control_table[I915_NUM_ENGINES][GEN9_MOCS_SIZE];
1375 bitmap_zero(s->shadow_ctx_desc_updated, I915_NUM_ENGINES); in intel_vgpu_setup_submission()1390 bitmap_zero(s->tlb_handle_pending, I915_NUM_ENGINES); in intel_vgpu_setup_submission()
582 static const struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
20 unsigned int reset_engine[I915_NUM_ENGINES];
92 struct intel_engine_cs *engine[I915_NUM_ENGINES];
252 return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd); in random_engine()519 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, in live_hwsp_engine()594 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, in live_hwsp_alternate()
121 I915_NUM_ENGINES enumerator
289 GEM_BUG_ON(id >= I915_NUM_ENGINES); in mock_engine()
389 struct i915_request *requests[I915_NUM_ENGINES] = {}; in __engines_record_defaults()
300 BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES); in intel_engine_setup()545 GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES)); in intel_engines_init_mmio()
33 } engine[I915_NUM_ENGINES];
1360 BUILD_BUG_ON(I915_RESET_ENGINE + I915_NUM_ENGINES > in intel_gt_set_wedged_on_init()
784 struct active_engine threads[I915_NUM_ENGINES] = {}; in __igt_reset_engines()
3529 struct task_struct *tsk[I915_NUM_ENGINES] = {}; in smoke_crescendo()3530 struct preempt_smoke arg[I915_NUM_ENGINES]; in smoke_crescendo()
206 } nodes[I915_NUM_ENGINES];
201 atomic_t reset_engine_count[I915_NUM_ENGINES];
404 BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES); in intel_device_info_runtime_init()
1242 (id__) < I915_NUM_ENGINES; \
633 I915_NUM_ENGINES > GUC_WQ_SIZE); in intel_guc_submission_enable()
307 e = alloc_engines(I915_NUM_ENGINES); in default_engines()317 GEM_BUG_ON(engine->legacy_idx >= I915_NUM_ENGINES); in default_engines()