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Searched refs:GENFC_RD__VSYNC_SEL_R__SHIFT (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7154 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x00000003 macro
H A Ddce_8_0_sh_mask.h10634 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
H A Ddce_10_0_sh_mask.h11018 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
H A Ddce_11_0_sh_mask.h10830 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
H A Ddce_11_2_sh_mask.h12084 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
H A Ddce_12_0_sh_mask.h2242 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h881 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h292 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h272 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro