Searched refs:DPLL_CFGCR0_HDMI_MODE (Results 1 – 2 of 2) sorted by relevance
2333 if (pll->state.hw_state.cfgcr0 & DPLL_CFGCR0_HDMI_MODE) { in cnl_ddi_pll_enable()2446 if (val & DPLL_CFGCR0_HDMI_MODE) { in cnl_ddi_pll_get_hw_state()2603 cfgcr0 = DPLL_CFGCR0_HDMI_MODE; in cnl_ddi_hdmi_pll_dividers()2838 if (pll->state.hw_state.cfgcr0 & DPLL_CFGCR0_HDMI_MODE) in cnl_ddi_pll_get_freq()
10467 #define DPLL_CFGCR0_HDMI_MODE (1 << 30) macro