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Searched refs:CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2783 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT 0x0000001f macro
H A Dgfx_7_2_sh_mask.h1108 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT 0x1f macro
H A Dgfx_8_1_sh_mask.h1948 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT 0x1f macro
H A Dgfx_8_0_sh_mask.h1424 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT 0x1f macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10960 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12245 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT … macro
H A Dgc_9_1_sh_mask.h12441 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17901 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16149 #define CP_RB2_CNTL__RB_RPTR_WR_ENA__SHIFT … macro