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Searched refs:CMCR (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/x86/include/asm/acpi/
H A Ddebug.asl25 CMCR, 8,
36 Store(0x03, CMCR) /* DTR=1 RTS=1 out1/2=Off loop=Off */
/OK3568_Linux_fs/kernel/drivers/net/wan/
H A Dhd64572.h229 #define CMCR 0x158 /* Counter Master Ctl Reg */ macro
/OK3568_Linux_fs/kernel/drivers/tty/
H A Dsynclink.c345 #define CMCR 0x10 /* Clock mode Control Register */ macro
4763 usc_OutReg( info, CMCR, RegValue ); in usc_set_sdlc_mode()
5044 usc_OutReg( info, CMCR, 0x0f64 ); in usc_enable_loopback()
6101 usc_OutReg( info, CMCR, 0x0f64 ); in usc_enable_async_clock()