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Searched refs:CLK_DIV_ISP0_VAL (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h484 #define CLK_DIV_ISP0_VAL 0x31 macro
751 #define CLK_DIV_ISP0_VAL 0x13131300 macro
H A Dclock_init_exynos5.c771 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5250_system_clock_init()
949 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5420_system_clock_init()