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Searched refs:BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1758 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h3248 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h3170 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h3240 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h3488 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h9320 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40069 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43303 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48812 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49182 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD__SHIFT … macro