Searched refs:AR933X_SRIF_DDR_DPLL3_REG (Results 1 – 2 of 2) sorted by relevance
149 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)154 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)235 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)238 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)250 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)260 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)
1121 #define AR933X_SRIF_DDR_DPLL3_REG 0x248 macro