Searched hist:f55f5f02a8dbad0fe47148ce867f85a2f25a6c6a (Results 1 – 2 of 2) sorted by relevance
| /rkbin/RKTRUST/ |
| H A D | RK3358TRUST.ini | f55f5f02a8dbad0fe47148ce867f85a2f25a6c6a Thu Jun 02 07:26:45 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326: bl31: update version to v1.31
Build from ATF commit:
244acd212 plat: px30-s: suspend: add ddr phy reg save
Update feature:
244acd212 plat: px30-s: suspend: add ddr phy reg save
680b18825 plat: px30-s: refactor ddr dfs set rate code
2d7dc684b plat: px30-s: add ddr eye scan func
f4b4c237c plat: px30-s: workaround x16 bw read training err
8abe5853e plat: px30-s: add default fsp config
2fa68b510 plat: px30-s: add de-skew info get from expanded param
faca0fa70 plat: px30-s: add get_wrlvl_val() fun after f1
6896d8e94 plat: px30-s: calculate tDQS2DQ before set rate
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ib477c168e94f4a8534e3e71273e75024929962c6
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| H A D | RK3326TRUST.ini | f55f5f02a8dbad0fe47148ce867f85a2f25a6c6a Thu Jun 02 07:26:45 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326: bl31: update version to v1.31
Build from ATF commit:
244acd212 plat: px30-s: suspend: add ddr phy reg save
Update feature:
244acd212 plat: px30-s: suspend: add ddr phy reg save
680b18825 plat: px30-s: refactor ddr dfs set rate code
2d7dc684b plat: px30-s: add ddr eye scan func
f4b4c237c plat: px30-s: workaround x16 bw read training err
8abe5853e plat: px30-s: add default fsp config
2fa68b510 plat: px30-s: add de-skew info get from expanded param
faca0fa70 plat: px30-s: add get_wrlvl_val() fun after f1
6896d8e94 plat: px30-s: calculate tDQS2DQ before set rate
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ib477c168e94f4a8534e3e71273e75024929962c6
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