Searched hist:f55ef85ebfd61d708f6c77465edf3f8d059ca93d (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/px30/drivers/secure/ |
| H A D | secure.c | f55ef85ebfd61d708f6c77465edf3f8d059ca93d Fri Oct 11 21:26:39 UTC 2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com> rockchip: px30: cleanup securing of ddr regions
So far the px30-related ddr security was loading data for regions to secure
from a pre-specified memory location and also setting region0 to secure
the first megabyte of memory in hard-coded setting (top=0, end=0, meaning
1MB).
To make things more explicit and easier to read add a function doing
the settings for specified memory areas, like other socs have and also
add an assert to make sure any descriptor read from memory does not
overlap the TZRAM security in region0 and TEE security in region1.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Change-Id: I78441875112bf66a62fde5f1789f4e52a78ef95f
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| /rk3399_ARM-atf/plat/rockchip/px30/ |
| H A D | px30_def.h | f55ef85ebfd61d708f6c77465edf3f8d059ca93d Fri Oct 11 21:26:39 UTC 2019 Heiko Stuebner <heiko.stuebner@theobroma-systems.com> rockchip: px30: cleanup securing of ddr regions
So far the px30-related ddr security was loading data for regions to secure
from a pre-specified memory location and also setting region0 to secure
the first megabyte of memory in hard-coded setting (top=0, end=0, meaning
1MB).
To make things more explicit and easier to read add a function doing
the settings for specified memory areas, like other socs have and also
add an assert to make sure any descriptor read from memory does not
overlap the TZRAM security in region0 and TEE security in region1.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Change-Id: I78441875112bf66a62fde5f1789f4e52a78ef95f
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