| /optee_os/core/arch/arm/include/kernel/ |
| H A D | thread_arch.h | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | spmc_sp_handler.h | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | thread_spmc.h | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | secure_partition.h | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/kernel/ |
| H A D | thread_spmc_a64.S | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | spmc_sp_handler.c | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | asm-defines.c | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | secure_partition.c | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | thread_spmc.c | d17db2afa6a46f22659c37116ad409a07fa18ebc Tue Dec 03 15:51:36 UTC 2024 Jens Wiklander <jens.wiklander@linaro.org> core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct
thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs
covers the registers x0-x17 to support passing arguments and results
according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as
argument nor result and the content was preserved. With this patch are
x8-x17 returned as zeroes. New FF-A SMCs can take and return values in
the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable
or scratch registers. FF-A has specified x0-x7 as argument and result
registers, regardless of SMCCC. This has changed with SMCCC version 1.2
where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for
compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|