Searched hist:cc0b2c44812a06b805028965cc3d3c288dbd716d (Results 1 – 3 of 3) sorted by relevance
| /optee_os/core/arch/arm/kernel/ |
| H A D | link_dummy.ld | cc0b2c44812a06b805028965cc3d3c288dbd716d Tue Apr 18 19:41:29 UTC 2017 Volodymyr Babchuk <vlad.babchuk@gmail.com> core_mmu: add non-secure DDR ranges support
This patch adds new macro `register_nsec_ddr` which allows
platform code to register non-secure memory ranges.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| H A D | kern.ld.S | cc0b2c44812a06b805028965cc3d3c288dbd716d Tue Apr 18 19:41:29 UTC 2017 Volodymyr Babchuk <vlad.babchuk@gmail.com> core_mmu: add non-secure DDR ranges support
This patch adds new macro `register_nsec_ddr` which allows
platform code to register non-secure memory ranges.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu.c | cc0b2c44812a06b805028965cc3d3c288dbd716d Tue Apr 18 19:41:29 UTC 2017 Volodymyr Babchuk <vlad.babchuk@gmail.com> core_mmu: add non-secure DDR ranges support
This patch adds new macro `register_nsec_ddr` which allows
platform code to register non-secure memory ranges.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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