"c29c4146b9245568365160d97cc3c913cf4cc6be" (history) in projects: optee_os

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/optee_os/core/arch/riscv/kernel/
H A D	csr_detect.S	`c29c4146b9245568365160d97cc3c913cf4cc6be Sun Aug 18 11:14:50 UTC 2024 Alvin Chang <alvinga@andestech.com> core: riscv: Fix initial value of a0 in "detect_csr" ASM macro To set initial value of the register a0 to 1, the assembly code should be "li a0, 1" instead of "addi a0, a0, 1". Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Yu-Chien Peter Lin <peterlin@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>`