Searched hist:bfef610667b75e731d0d263b069369f7695c6c83 (Results 1 – 1 of 1) sorted by relevance
| /rk3399_ARM-atf/services/std_svc/ |
| H A D | std_svc_setup.c | bfef610667b75e731d0d263b069369f7695c6c83 Mon Oct 31 17:17:21 UTC 2016 dp-arm <dimitris.papastamos@arm.com> Perform a cache flush after ENTER PSCI timestamp capture
Without an explicit cache flush, the next timestamp captured might have
a bogus value.
This can happen if the following operations happen in order,
on a CPU that's being powered down.
1) ENTER PSCI timestamp is captured with caches enabled.
2) The next timestamp (ENTER_HW_LOW_PWR) is captured with caches
disabled.
3) On a system that uses a write-back cache configuration, the
cache line that holds the PMF timestamps is evicted.
After step 1), the ENTER_PSCI timestamp is cached and not in main memory.
After step 2), the ENTER_HW_LOW_PWR timestamp is stored in main memory.
Before the CPU power down happens, the hardware evicts the cache line that
contains the PMF timestamps for this service. As a result, the timestamp
captured in step 2) is overwritten with a bogus value.
Change-Id: Ic1bd816498d1a6d4dc16540208ed3a5efe43f529
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
|