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H A Dcortex_a57.Sb1a9631d8110a2bcd458ec5809b50d5263a200ef Mon Sep 22 11:15:26 UTC 2014 Soby Mathew <soby.mathew@arm.com> Optimize barrier usage during Cortex-A57 power down

This the patch replaces the DSB SY with DSB ISH
after disabling L2 prefetches during the Cortex-A57
power down sequence.

Change-Id: I048d12d830c1b974b161224eff079fb9f8ecf52d